RTL Design Engineer (ASIC/SOC)

Responsibilities: Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout. Create and maintain reusable IPs for AI/in-memory computing. Support Post-Si testing to ensure product functionality and quali